CY7C1460KV33-167AXCT
现货,推荐
符合RoHS标准
无铅

CY7C1460KV33-167AXCT

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CY7C1460KV33-167AXCT
CY7C1460KV33-167AXCT


商品详情

  • ECC
    N
  • Frequency
    167 MHz
  • 密度
    36 MBit
  • 峰值回流温度
    260 °C
  • 工作温度 范围
    0 °C 至 70 °C
  • 工作电压 范围
    3 V 至 3.6 V
  • 引线球表面
    Ni/Pd/Au
  • 接口
    Parallel
  • 数据宽度
    x 36
  • 架构
    NoBL, Pipeline
  • 片上端接
    N
  • 目前计划的可用性至少到
    2031
  • 系列
    NoBL
  • 组织(X x Y)
    1Mb x 36
  • 读取延迟(周期)
    1
  • 质量等级
    Commercial
  • 银行切换
    N

OPN
CY7C1460KV33-167AXCT
产品状态 active and preferred
英飞凌封装名称
封装名 TQFP-100 (51-85050)
封装尺寸 750
封装类型 TAPE & REEL
湿度 3
防潮封装 DRY
无铅 Yes
无卤素 Yes
符合RoHS标准 Yes
预估长期供货截止日期 2031
产品发布日期 03/2022
封装产地
PH
晶圆产地
TW

产品状态
Active
英飞凌封装名称
封装名 TQFP-100 (51-85050)
封装尺寸 750
封装类型 TAPE & REEL
湿度 3
防潮封装 DRY
无铅
无卤素
符合 RoHS 标准
预估长期供货截止日期 2031
产品发布日期 03/2022
封装产地
PH
晶圆产地
TW
CY7C1460KV33-167AXCT is a 36-Mbit (1M × 36) synchronous pipelined burst SRAM using NoBL™ logic to enable true back-to-back read/write transfers with zero wait states at up to 167 MHz. It operates from a 3.3 V core supply with 3.3 V/2.5 V I/O, supports byte writes, and offers linear or interleaved 4-beat bursts. Fully registered I/O, IEEE 1149.1 JTAG, and ZZ sleep mode are included.

特性

  • 36-Mbit sync pipelined SRAM
  • NoBL logic, zero wait-state bursts
  • Supports 250-MHz bus operation
  • Clock-to-output tCO max 2.5 ns
  • Fully registered I/O on rising clock
  • On-chip burst counter, up to 4 beats
  • Linear or interleaved burst sequence
  • Byte write with BW[x] byte selects
  • Self-timed synchronous write
  • CEN clock enable suspends operation
  • ZZ sleep mode with data retention
  • IEEE 1149.1 JTAG boundary scan

产品优势

  • Zero wait states boost throughput
  • 250 MHz supports fast datapaths
  • 2.5 ns tCO reduces read latency
  • Registered I/O eases timing closure
  • 4-beat bursts cut address toggling
  • Burst mode fits cacheline transfers
  • Byte writes simplify RMW updates
  • Self-timed writes simplify control
  • CEN enables quick pause/resume
  • ZZ sleep lowers standby power
  • Data retained in sleep protects data
  • JTAG scan speeds board test

应用

文档

设计资源

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