Background for document preview
Background for thumbnail

AN80555 72 MBIT RH QDR II+ INTERFACE CONTROLLER IMPLEMENTATION DETAILS

AN80555 application note describes the architecture and timing details of a RHQDR II+ memory interface controller implementation for Infineon's Radiation Hardened QDRII+ SRAMs. The accompanying synthesizable reference design targets Xilinx Virtex-5QV family of FPGA devices.

627.46 KB
14/05/2020