CY7C1470BV33-250BZXC
现货，推荐
符合RoHS标准
无铅

CY7C1470BV33-250BZXC

数据手册
封装

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CY7C1470BV33-250BZXC
CY7C1470BV33-250BZXC
数据手册


商品详情

  • ECC
    N
  • Frequency
    250 MHz
  • 密度
    72 MBit
  • 峰值回流温度
    260 °C
  • 工作温度 范围
    0 °C 至 70 °C
  • 工作电压 范围
    3.14 V 至 3.63 V
  • 引线球表面
    Sn/Ag/Cu
  • 接口
    Parallel
  • 数据宽度
    x 36
  • 架构
    NoBL, Pipeline
  • 片上端接
    N
  • 系列
    NoBL
  • 组织(X x Y)
    2Mb x 36
  • 读取延迟(周期)
    1
  • 质量等级
    Commercial
  • 银行切换
    N

推荐的
OPN
CY7C1470BV33-250BZXC
产品状态 active and preferred
英飞凌封装名称
PG-BGA-165
封装名 FBGA-165 (51-85165)
封装尺寸 210
封装类型 TRAY
湿度 3
防潮封装 DRY
无铅 Yes
无卤素 Yes
符合RoHS标准 Yes
封装产地
TW
晶圆产地
US

产品状态
Active
英飞凌封装名称
PG-BGA-165
封装名 FBGA-165 (51-85165)
封装尺寸 210
封装类型 TRAY
湿度 3
防潮封装 DRY
无铅
无卤素
符合 RoHS 标准
封装产地
TW
晶圆产地
US
CY7C1470BV33-250BZXC is a 72-Mbit (2M × 36) synchronous pipelined burst SRAM with No Bus Latency (NoBL) logic for zero-wait-state back-to-back reads and writes. It supports 250 MHz operation with fully registered inputs and outputs and 3.0 ns maximum clock-to-output delay. It includes BWa–BWd byte write, linear or interleaved 4-beat burst, CEN clock suspend, and ZZ sleep mode. It uses a 3.3 V core with 3.3 V/2.5 V I/O in a Pb-free 165-ball FBGA.

特性

  • 72-Mbit sync pipelined SRAM
  • No Bus Latency (NoBL) logic
  • 250 MHz bus ops, zero wait states
  • Registered inputs and outputs
  • Linear or interleaved burst order
  • Byte write with BWx byte selects
  • VDD 3.135 V to 3.6 V single rail
  • VDDQ I/O: 2.5 V or 3.3 V
  • 3.0 ns clock-to-output (250 MHz)
  • ZZ sleep mode and Stop Clock
  • IEEE 1149.1 JTAG boundary scan
  • Neutron SER: 361 FIT/Mb typ, 25C

产品优势

  • Run back-to-back ops with no stalls
  • More throughput each clock cycle
  • Drop-in path for ZBT designs
  • Predictable timing simplifies closure
  • Burst support fits streaming data
  • Byte writes cut rewrite bandwidth
  • Single-rail core eases power design
  • Direct 2.5/3.3 V logic connection
  • 3.0 ns tCO reduces read latency
  • Sleep/stop clock cuts idle power
  • JTAG simplifies board test & debug
  • Lower soft-error risk in systems

应用

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