CY7C1470V25-200AXC
现货,推荐
符合RoHS标准
无铅

CY7C1470V25-200AXC

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CY7C1470V25-200AXC
CY7C1470V25-200AXC


商品详情

  • ECC
    N
  • Frequency
    200 MHz
  • 密度
    72 MBit
  • 峰值回流温度
    260 °C
  • 工作温度 范围
    0 °C 至 70 °C
  • 工作电压 范围
    2.38 V 至 2.63 V
  • 引线球表面
    Pure Sn
  • 接口
    Parallel
  • 数据宽度
    x 36
  • 架构
    NoBL, Pipeline
  • 片上端接
    N
  • 系列
    NoBL
  • 组织(X x Y)
    2Mb x 36
  • 读取延迟(周期)
    1
  • 质量等级
    Commercial
  • 银行切换
    N

OPN
CY7C1470V25-200AXC
产品状态 active and preferred
英飞凌封装名称
封装名 TQFP-100 (51-85050)
封装尺寸 360
封装类型 TRAY
湿度 3
防潮封装 DRY
无铅 Yes
无卤素 Yes
符合RoHS标准 Yes
封装产地
TW
晶圆产地
US

产品状态
Active
英飞凌封装名称
封装名 TQFP-100 (51-85050)
封装尺寸 360
封装类型 TRAY
湿度 3
防潮封装 DRY
无铅
无卤素
符合 RoHS 标准
封装产地
TW
晶圆产地
US
CY7C1470V25-200AXC is a 72-Mbit (2M × 36) 2.5 V synchronous pipelined burst SRAM with NoBL architecture, supporting 200 MHz bus operation with zero wait states. It uses registered inputs/outputs, 3 chip enables plus asynchronous OE, and an on-chip burst counter for up to four transfers (linear or interleaved). Byte-write (BWa–BWd) and ZZ sleep mode are supported. Packaged in 100-pin Pb-free TQFP.

特性

  • NoBL SRAM, zero wait-state R/W
  • 200 MHz synchronous pipelined bus
  • Fully registered inputs and outputs
  • 3.0 ns max clock-to-output (tCO)
  • Burst counter: up to 4 transfers
  • Linear or interleaved burst order
  • Byte write with BW[x] selects
  • 2.5 V VDD supply (2.375-2.625 V)
  • 2.5 V VDDQ I/O supply (2.375-VDD)
  • Clock enable (CEN) stalls clock
  • Asynchronous OE for tri-state control
  • IEEE 1149.1 JTAG boundary scan

产品优势

  • No wait states boost bandwidth
  • 200 MHz supports fast SRAM buses
  • Registered I/O eases timing closure
  • 3.0 ns tCO cuts read latency
  • 4-beat bursts reduce addr toggles
  • Burst order fits cache line needs
  • Byte writes simplify RMW updates
  • 2.5 V core lowers power vs 3.3 V
  • 2.5 V I/O matches common logic
  • CEN enables cycle stretching
  • OE prevents bus contention
  • JTAG speeds board test/debug

应用

文档

设计资源

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