CY7C1520KV18-333BZXI
现货，推荐
符合RoHS标准
无铅

CY7C1520KV18-333BZXI

数据手册
封装

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CY7C1520KV18-333BZXI
CY7C1520KV18-333BZXI
数据手册


商品详情

  • Frequency
    333 MHz
  • 密度
    72 MBit
  • 峰值回流温度
    260 °C
  • 工作温度 范围
    -40 °C 至 85 °C
  • 工作电压 范围
    1.7 V 至 1.9 V
  • 引线球表面
    Sn/Ag/Cu
  • 接口
    Parallel
  • 系列
    DDR-II CIO
  • 组织(X x Y)
    2M x 36
  • 质量等级
    Industrial

推荐的
OPN
CY7C1520KV18-333BZXI
产品状态 active and preferred
英飞凌封装名称
PG-BGA-165
封装名 FBGA-165 (51-85180)
封装尺寸 272
封装类型 TRAY
湿度 3
防潮封装 DRY
无铅 Yes
无卤素 Yes
符合RoHS标准 Yes
封装产地
TH
晶圆产地
TW

产品状态
Active
英飞凌封装名称
PG-BGA-165
封装名 FBGA-165 (51-85180)
封装尺寸 272
封装类型 TRAY
湿度 3
防潮封装 DRY
无铅
无卤素
符合 RoHS 标准
封装产地
TH
晶圆产地
TW
CY7C1520KV18-333BZXI is a 72-Mbit (2M × 36) DDR-II synchronous pipelined SRAM with two-word burst architecture. It supports 333 MHz clocks with DDR transfers to 666 MHz and offers 1.5-cycle read latency (DOFF HIGH) or 1-cycle DDR-I-compatible latency (DOFF LOW). It uses 1.7 V to 1.9 V VDD with 1.4 V to VDD VDDQ, and comes in a 165-ball FBGA (13 × 15 × 1.4 mm) Pb-free industrial package.

特性

  • 72-Mbit DDR-II sync SRAM
  • 333 MHz clock, 666 MHz data xfer
  • Two-word burst, 1-bit counter
  • 1.5-cycle read latency (DOFF HI)
  • 1-cycle read latency (DOFF LO)
  • Dual input clocks K/K
  • Dual output clocks C/C
  • Echo clocks CQ/CQ
  • Byte write via BWS signals
  • ZQ sets output impedance
  • PLL runs 120 MHz to fMAX
  • IEEE 1149.1 JTAG boundary scan

产品优势

  • High bandwidth at 333 MHz clocks
  • Cuts addr bus rate with 2-word burst
  • Latency option fits DDR-I/DDR-II
  • Improves DDR timing with K/K clocks
  • Reduces skew using C/C clocks
  • Simplifies capture with CQ/CQ clocks
  • Byte writes avoid read-modify-write
  • Impedance control improves SI
  • PLL stabilizes high-speed timing
  • Depth expansion without wait states
  • Pipeline starts every K rising edge
  • Eases board test with JTAG scan

应用

文档

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