CY7C1615KV18-300BZXI
现货,推荐
符合RoHS标准
无铅

CY7C1615KV18-300BZXI

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CY7C1615KV18-300BZXI
CY7C1615KV18-300BZXI


商品详情

  • ECC
    N
  • Frequency
    300 MHz
  • 密度
    144 MBit
  • 峰值回流温度
    260 °C
  • 工作温度 范围
    -40 °C 至 85 °C
  • 工作电压 范围
    1.7 V 至 1.9 V
  • 引线球表面
    Sn/Ag/Cu
  • 接口
    Parallel
  • 数据宽度
    x 36
  • 架构
    QDR-II
  • 片上端接
    N
  • 系列
    QDR-II
  • 组织(X x Y)
    4Mb x 36
  • 脉冲长度 (Words)
    4
  • 读取延迟(周期)
    1.5
  • 质量等级
    Industrial
  • 银行切换
    N

OPN
CY7C1615KV18-300BZXI
产品状态 active and preferred
英飞凌封装名称
封装名 FBGA-165 (51-85195)
封装尺寸 105
封装类型 TRAY
湿度 3
防潮封装 DRY
无铅 Yes
无卤素 Yes
符合RoHS标准 Yes
封装产地
TH
晶圆产地
TW

产品状态
Active
英飞凌封装名称
封装名 FBGA-165 (51-85195)
封装尺寸 105
封装类型 TRAY
湿度 3
防潮封装 DRY
无铅
无卤素
符合 RoHS 标准
封装产地
TH
晶圆产地
TW
CY7C1615KV18-300BZXI is a 144-Mbit QDR II synchronous pipelined SRAM (4 M × 36) with separate read and write ports for concurrent transactions. It supports DDR transfers at 666 MHz using a 333 MHz clock and four-word burst operation, with 1.5-cycle read latency when DOFF is high. It operates over the industrial range (TA −40°C to +85°C) from 1.7–1.9 V VDD and 1.4 V to VDD VDDQ in a 165-ball FBGA.

特性

  • Dual R/W ports, no bus turnaround
  • 333 MHz clock, DDR data at 666 MHz
  • Four-word burst per address
  • 1.5-cycle read latency (DOFF=H)
  • 1-cycle read latency (DOFF=L)
  • Single clock mode (tie C/C HIGH)
  • Echo clocks CQ/CQ for data capture
  • PLL locks after 20 us stable clock
  • ZQ+RQ programmable output impedance
  • Byte write via BWS[x:0]
  • 1.7-1.9 V core; 1.4 V-VDDQ I/O
  • IEEE 1149.1 JTAG test access port

产品优势

  • Eliminates bus turnaround delays
  • High bandwidth with 333 MHz clocks
  • Lower address rate, fewer addr pins
  • Predictable pipeline read timing
  • Optional lower latency QDR I mode
  • Simplifies clocking, less skew risk
  • Echo clocks ease high-speed capture
  • Fast PLL lock speeds system bring-up
  • Impedance match improves signal SI
  • Byte writes avoid read-modify-write
  • Supports 1.5 V or 1.8 V I/O rails
  • Boundary scan speeds PCB test

应用

文档

设计资源

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